Research Profile

 

Nanoelectronics and Nanotechnology

Image Copyright: © IHT RWTH

One focus of our research is the work on nanoscale field-effect transistors (FETs), reconfigurable FETs as well as band-to-band tunnel FETs. As basis for our work we employ traditional bulk materials such as bulk-silicon, silicon-on-insulator, group IV heterostructures (i.e. the SiGeSn material system) but also novel nanoscale structures such as two-dimensional materials. Integrating additional, individually addressable gate electrodes along the channel of a FET, allows manipulating the potential within the device to realize certain device functionalities. For instance, dual-gate FETs (top image on the left) can be operated to work as n-type and p-type FET if appropriate gate voltages are applied. Adding a third gate (see left botton image) allows adjusting n-/p-type as well as so-called band-to-band tunnel FETs. We have also been working on extending to multi-gate device concept by realizing buried multigate platforms that feature ten to twenty gate electrodes with a gate length and inter-gate-electrode distance down to approximately 5 nm. Such multigate substrates enable the modulation of the potential on the nanoscale.

In order to manufacture our devices we employ and further develop advanced nanofabrication techniques such as combined spacer-/damascene processes, etching 3D silicon nanostructures with Bosch processes, hydrogen annealing of silicon, chemical-mechanical polishing, wafer-bonding, atomic layer etching/deposition etc.

 
 

Quantum Technology

Isotopically purified 28Si is a very attractive material for semiconductor spin qubits since it promises rather long coherence times because it is nuclear spin free. At the same time, the mature and highly sophisticated silicon manufacturing technology of the semiconductor industry can be employed to fabricate qubit devices. We investigate in how far fabrication techniques such as spacer lithography can be exploited to increase yield and reduce variability of the qubit devices.

Since the spin qubits are realized with multiple gate structures that need to be addressed individually in order to enable setting, manipulation, error correction and read-out of the qubits, a classical control electronics is required that must be operated at crygenic temperatures. Due to the rather low cooling power of cryostats at such temperatures, this cryogenic control electronics must be operated with supply voltages in the few tens of millivolt range in order to reach the required low power consumption. Interestingly, although the ideal value oft he inverse subthreshold slope decreases linearly with temperature, the switching of MOSFETs saturates due to band tailing. As a result, steep slope transistors are not only required at room but also at cryogenic temperatures. We currently study ways to realize such cryogenic steep slope FETs.

 
 

Neuromorphic Hardware

Neuromorphic Hardware Copyright: © IHT RWTH

The human brain is the most complex and most sophisticated information processing system known. Due to a massively parallel operation the brain is able to process huge amounts of data with very little energy consumption. This extremely parallel information processing is made possible by a very high degree of interconnects between neurons that can be set and reset autonomously during learning processes. Demonstrating a similarly complex yet flexible interconnectivity is a major challenge of artificial neuronal networks.

Memristive materials have recently been employed in order to mimic the functionality of synapses. For instance, cross-bar arrays have been realized with electro-chemical metalization materials in-between two perpendicular metal electrodes that allow to grow a filament that connects the two electrodes with variable weight and retention time. However, such cross-bar arrays provide only a limited connectivity since they merely employ vertical memristive cells. Currently, we work on the realization of a 3D interconnect system where the cross-bar electrodes are reduced to mush-room shaped electrodes positioned in an alternating grid such that each electrode can be connected to its six nearest neighbors. This way, a strongly increased connectivity is obtained.

 
 

Financial support by various funding agencies is gratefully acknowledged.