Bücher und Buchkapitel




The author presents all aspects, in theory and experiments, of nanoelectronic devices starting from field-effect transistors and leading to alternative device concepts such as Schottky-barrier MOSFETs and band-to-band tunnel FETs. Latest advances in Nanoelectronics, as ultralow power nanoscale devices and the realization of silicon MOS spin qubits, are discussed and finally a brief introduction into device simulations is given as well.



  Titelseite eines Buches

Kapitel 8: Transition metal dichalcogenide schottky barrier transistors: A device analysis and material comparison

J. Appenzeller, F. Zhang, S. Das und J. Knoch

This chapter explores various transition metal dichalcogenide (TMD) Schottky barrier (SB) field-effect transistors (FETs). After a brief introduction of the difference between a conventional metal oxide semiconductor field-effect transistor and a Schottky barrier (SB) transistor in section I, we turn our attention in section II to a number of different techniques that allow extracting information about the SBs from electrical device characteristic. Three different means to gain the relevant insights are discussed in the respective subsections. Section III takes then experimental results of TMDFETs and applies the analysis methods described in section II also addressing why certain techniques are more appropriate for certain devices and materials. Both, on- and off-state characteristics will be discussed in the section and then compared with fully self-consistent non-equilibrium Green’s function (NEGF) results obtained for various planar transistors, elucidating in particular the impact of critical material parameters on the device performance.

  Titelseite eines Buches

Kapitel 24: One-Dimensional Field-Effect Transistors


In recent years, one-dimensional (1D) nanostructures such as nanowires and nanotubes have attracted a great deal of attention as building blocks of future nanoelectronic circuits. The interest stems from the fact that the geometric constriction in two dimensions not only leads to higher integration densities of circuits but also results in one-dimensional electronic transport due to quantum confinement. Nanowires consisting of group III–V compound semiconductors and in particular carbon nanotubes have been studied intensively. The latter are particularly attractive because of their geometric compactness (small size), excellent transport properties, and demonstrated capacity for 1D electronic transport at room temperature. As will be discussed in detail below, 1D nanostructures offer a number of advantages related to the geometric compactness that ultimately enables the production of scaled field-effect transistors, and also related to the one-dimensional density of states of these structures, which is beneficial for the performance of FETs.

  Titelseite eines Buches

Kapitel 14: Metal-Oxide-Semiconductor Field-Effect Transistors: Novel Materials and Alternative Concepts

J.Knoch, S. Mantl und S. Feste

The first transistor was built at Bell Laboratories by John Bardeen and Walter Brattain in Shockley’s group. The point-contact transistor consisted of a piece of n-type Ge, several mm large, on a metal plate that served as the gate contact and two spring-loaded top contacts, called the emitter and collector. These contacts were made with gold foils attached to the two sides of the triangle. Biasing the back contact produced an inversion layer in the n-Ge on the top side and a hole current was observed between the emitter and the negatively biased collector. Scaling of transistor dimensions has led to an enormous miniaturization and performance increase of MOSFETs, and research devices have a gate length of only 10 nm. Source, drain, and gate are fabricated on single crystalline silicon. The gate is made of polysilicon with a width of only 10 nm and a height of 50 nm. The central region of the transistor, consisting of doped silicon, the thin silicon dioxide layer and the silicided polysilicon contact, forms a MOS capacitor, which plays a key role in the performance of the transistor. However, future metal-oxide-semiconductor field-effect transistors (MOSFET) are considered revolutionary in terms of integrating new materials and device designs in order to maintain performance increases and higher integration densities of next-generation ICs. Huge performance improvements are possible if in addition to an aggressive down-scaling of the devices i) new materials and ii) new device architectures are integrated into the existing Si technology. The present chapter is intended to give an overview of current technology trends. Starting from an introduction into the device physics aspects of MOSFETs and their scaling behavior, strained silicon and high-k/metal gate stacks representing the most common new materials are elaborated on. Afterwards, nanowire transistors will be discussed and finally band-to-band tunnel FETs are studied as one of the most promising candidates of devices relying on an alternative device working principle.

  Titelseite eines Buches

Kapitel 8: Tunneling Field-Effect Transistors: Challenges and Perspectives

J. Knoch

In recent years tunnel FETs (TFETs) have attracted a great deal of attention. However, experimental devices to date exhibit a performance substantially inferior compared to conventional MOSFET devices. Here we will illuminate some principal device physics aspects of TFETs and elaborate on the impact of device structure, transistor dimensions and the choice of material on the performance of TFETs. In particular, the use of heterostructures and nanowires/tubes will be analyzed in detail suggesting solutions to the most relevant TFET issues.

  Titelseite eines Buches

Kapitel 10: Electronic Transport in Carbon Nanotube Field-Effect Transistors

J. Knoch und J. Appenzeller

In the present chapter we will discuss the electronic transport properties of carbon nanotube field-effect transistors (CNFETs). Three different device concepts will be studied in more detail: Schottky-barrier CNFETs with metallic source and drain contacts, conventional-type CNFETs with doped nanotube segments as source and drain electrodes and finally a new concept, the tunneling CNFET. As it turns out, the main factors determining the electrical behavior of CNFETs are the geometry, the one-dimensionality of the electronic transport and the way of making contacts to the nanotube. Analytical as well as simulation results will be given and compared with each other and with experimental data in order to explain the different influences on the electronic transport in CNFETs and thus on the device behavior.

  Titelseite eines Buches

Kapitel 6.2: Carbon Nanotube Field-Effect Transistors - The Importance of Being Small

J. Knoch und J. Appenzeller

In this chapter we elucidate the peculiarities of one-dimensional field-effect transistors by studying electronic transport in carbon nanotube field-effect transistors (CNFETs). It is shown that the ''geometrical smallness'' - meaning the extremely small diam- eter of carbon nanotubes - as well as the ''electrical smallness,'' (i.e., the one-dimensionality of electronic transport in nanotubes), determine the electrical response of CNFETs. A model for the simulation of this electrical response of CNFETs is introduced and predictions based on this model are compared with analytical expressions as well as with experiments. It turns out that the particular behavior of CNFETs can be explained within a Schottky barrier transistor model with modified electrostatics and 1D transport. As an example of this behavior, the appearance of multimode transport in CNFETs is discussed in detail and the impact on the electrical characteristics is illuminated.

  Titelseite eines Buches

Semiconductor Nanostructures and Devices

J. Knoch und H. Lüth

In this paper we present semiconductor nanostructures and devices for future nanoelectronics applications. New device architectures for advanced CMOS as well as novel concepts for a beyond CMOS scenario are presented and discussed. We study SOI Schottky-barrier MOSFETs and show methods for improving the device performance using dopant segregation during silicidation as well as ultrathin body SOI and ultrathin gate oxides. Furthermore, electronic transport in GaN and InN nanowire structures is discussed. In addition, novel device concepts are also introduced and the electronic transport in such structures is studied. In particular, nanoscale resonant tunneling diodes with improved peak-to valley ratio and a band-to-band tunneling transistor based on a nanowire/ nanotube that allows for subthreshold swing smaller than 60mV/dec are presented.